// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  isp_prescaler_regs_reg_offset.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2013/3/10
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/03/19 14:38:19 Create file
// ******************************************************************************

#ifndef __ISP_PRESCALER_REGS_REG_OFFSET_H__
#define __ISP_PRESCALER_REGS_REG_OFFSET_H__

/* ISP_PRESCALER_REGS Base address of Module's Register */
#define SOC_ISP_PRESCALER_REGS_BASE                       (0x0)

/******************************************************************************/
/*                      SOC ISP_PRESCALER_REGS Registers' Definitions                            */
/******************************************************************************/

#define SOC_ISP_PRESCALER_REGS_HCROP_REG            (SOC_ISP_PRESCALER_REGS_BASE + 0x0) /* horizontal cropping configuration. */
#define SOC_ISP_PRESCALER_REGS_VCROP_REG            (SOC_ISP_PRESCALER_REGS_BASE + 0x4) /* vertical cropping configuration. */
#define SOC_ISP_PRESCALER_REGS_MODE_REG             (SOC_ISP_PRESCALER_REGS_BASE + 0x8) /* Prescaler Mode. */
#define SOC_ISP_PRESCALER_REGS_FORCE_CLK_ON_CFG_REG (SOC_ISP_PRESCALER_REGS_BASE + 0xC) /* used to force the clock which is generally controlled by HW. */

#endif // __ISP_PRESCALER_REGS_REG_OFFSET_H__
